This invention relates generally to an integrated circuit (IC) which performs a dedicated task and requires a clock signal. Specifically, the IC of the present invention performs its dedicated task in a background mode from a processor's prospective. Further, the IC performs this dedicated task substantially independent of interaction with the processor and other devices.
Most ICs which require a clock signal specify a maximum speed at which the IC operates. This specification typically takes the form of a maximum frequency or minimum time period that the clock signal must observe. The maximum speed specification typically accounts for temperature and process variations. In effect, each IC may be guaranteed to operate at least at the specified maximum speed regardless of a particular operating temperature within an acceptable temperature range or a particular wafer or batch in which the IC is processed. Accordingly, the specified maximum speed is slower than a true maximum speed at which most ICs will operate.
Conventional design rules require a circuit designer to supply an IC with a clock signal that is slower than the specified maximum speed to insure proper operation over a wide variation in conditions. However, this technique almost certainly causes the IC to constantly operate slower than the true maximum speed.
Depending upon the application, undesirable consequences result. In certain ICs which perform dedicated digital signal processing tasks, a reduced precision may result from accomplishing less processing in a given time frame than could result from using a clock operating at a true maximum speed. Likewise, in certain cryptography applications where an IC performs a dedicated cryptographic algorithm, a user may be forced to wait undesirably long periods of time, which could be reduced by utilizing a clock operating at a true maximum speed.